1. Field of the Invention
The present invention relates to a method of fabricating a low-temperature poly-silicon thin film transistor using a metal induced lateral crystallization (MILC) technology, and more particularly, to a new method of fabricating a thin film transistor in which an additional mask process and a separate ion injection process are not necessary in order to form an off-set and lightly doped drain (LDD) structure.
2. Description of the Related Art
In general, a thin film transistor which is used in a display device such as a liquid crystal display (LCD) or an organic light emitting diode (OLED) is fabricated by the processes of depositing amorphous silicon on a transparent substrate such as glass or quartz, forming a gate insulator and a gate electrode, injecting a dopant into a source and drain, and then annealing the dopant-injected source and drain so as to be activated to then form an insulation layer.
By the way, as a display device using a thin film transistor requires for a fast operating speed and becomes compact in size, a degree of integration of a driving integrated circuit (IC) becomes large and an aperture ratio of a pixel region becomes reduced. Accordingly, an electron mobility on a silicon film should be heightened so that a driving circuit is formed on a pixel thin film transistor (TFT) and a glass substrate simultaneously, and an aperture ratio of each pixel should be heightened.
For this purpose, an amorphous silicon film is crystallized by metal induced lateral crystallization (MILC) to thus form a poly-crystallization thin film transistor. Accordingly, in addition to the need to heighten the electron mobility and the pixel aperture ratio, a driving circuit is formed simultaneously together with a pixel thin film transistor (TFT), to thereby provide a merit of reducing a production cost. In addition to the MILC, a solid phase crystallization (SPC) method by high-temperature heat treatment and an eximer laser annealing (ELA) method by laser crystallization are known as the amorphous silicon film crystallization method.
Meanwhile, since a leakage current is large in the case of a poly-crystallization thin film transistor differently from an amorphous thin film transistor, a lightly doped drain (LDD) structure has been known as being essential in order to suppress the leakage current (see IEEE Trans. Electron Devices, Vol. 40, No. 5, p. 938, 1993).
In particular, it is reported that leakage current is caused by metal pollution at a boundary portion between a source/drain and a channel, in the case of a MILC poly-crystallization thin film transistor (see IEEE Trans. Electron Devices, Vol. 32, p. 258, 1998).
Also, in the case that a thin film transistor is generally fabricated using MILC, a boundary plane between MILC and MIC (Metal Induced Crystallization) is positioned in a channel region. As a result, a trap phenomenon occurs at the channel region through the boundary plane, to thereby influence upon features of the thin film transistor device. Thus, in order to avoid the trap phenomenon, it is necessary to form an off-set region between a metal film for MILC and a gate insulation film.
A conventional method of fabricating a thin film transistor using a MILC method will follow.
FIGS. 1A through 1D are cross-sectional views for explaining a conventional low-temperature poly-silicon thin film transistor fabrication method using a MILC method, respectively.
Referring to FIG. 1A, a buffer layer 10 made of an oxide film is formed on an insulation substrate such as a glass substrate (not shown), and then an amorphous silicon film is formed on the buffer layer 10. An active layer pattern 11 is formed by photographically etching the amorphous silicon film. Subsequently, an insulation film and a metal film are deposited on the active pattern 11, and then patterned by a photographic etching process, to thereby form a gate electrode 13 and a gate insulation film 12.
Then, referring to FIG. 1B, a lightly doped drain (LDD) region 17 is formed through low-concentration ion injection. Then, as shown in FIG. 1C, a spacer 14 is formed at both sides of the gate electrode 13 and the gate insulation film 12 using a photosensitive agent, to thereby form an off-set structure. Then, a nickel (Ni) film 15 is deposited on the entire surface as crystallization expediting metal, and then a source 11S and a drain 11D are formed through high-concentration ion injection.
Referring to FIG. 1D, the photosensitive film 14 is removed by using a lift-off method, and then a MILC heat treatment is performed between 400° C. through 600° C. which is not more than a glass modification temperature of glass used as a substrate, to thereby crystallize a channel portion 16.
As described above, in the case of a conventional thin film transistor fabrication method using the MILC method, separate photographic etching processes are necessary to form an off-set structure and a LDD structure. Thus, these separate photographic etching processes cause productivity to be lowered and production cost to increase. Also, in order to form a LDD region at a junction portion between a channel and a source/drain, a separate ion injection process differing from the ion injection concentration injected into the source/drain region becomes necessary.
Thus, in order to form a LDD region, an additional ion injection process and a spacer forming process are necessary as described above, which also causes productivity to be lowered and production cost to increase.